XDLINX Labs is looking to hire an RTL Design Engineer.
You will have the opportunity to work alongside a brilliant and passionate team of engineers working on the architecture, simulation, and controls of electromechanical systems for the world’s most cutting-edge satellites.
As such, we have an intense culture of curiosity, hunger, and results. If you want a typical 9-5 job, this is not the place for you.
You do not need to meet 100% of the preferred qualifications to be considered. We encourage anyone who meets the basic qualifications and is interested in the role to apply – we are looking for enthusiastic, dedicated people to join our team, and want the opportunity to talk to you!
Position Overview:
We are seeking a highly skilled and motivated FPGA RTL Design Developer to join our team. The ideal candidate will be responsible for developing and implementing RTL designs for Xilinx FPGAs, focusing on DSP algorithms and efficient architecture implementations.
Responsibilities:
· Design, implement, and verify RTL designs targeting Xilinx FPGAs.
· Collaborate with cross-functional teams to understand and refine DSP algorithms for FPGA implementation.
· Create and optimize architectures for efficient resource utilization and performance.
· Perform simulation, synthesis, and timing analysis to ensure design functionality and meet performance goals.
· Debug and troubleshoot FPGA designs, identifying and resolving issues.
· Stay updated with the latest FPGA technologies and tools, incorporating best practices into design methodologies.
· Document designs, specifications, and test plans comprehensively.
Requirements:
· Bachelor’s/Master’s degree in Electrical Engineering, Computer Engineering, or related field.
· Proven experience (2 to 5 years) in RTL design and development for FPGAs, particularly with Xilinx devices.
· Strong understanding of DSP algorithms and their implementation in FPGA architectures.
· Proficiency in HDL languages (Verilog/SystemVerilog) and FPGA design tools (Vivado, Quartus).
· Familiarity with simulation tools (ModelSim, Questa) and scripting languages (Python, Tcl) for automation.
· Solid grasp of synthesis, timing closure, and FPGA optimization techniques.
· Excellent problem-solving skills and attention to detail.
· Ability to work independently and collaboratively in a team environment.
· Strong communication skills to effectively convey technical concepts and collaborate with multidisciplinary teams.
Preferred Qualifications:
· Experience with high-speed interfaces (PCIe, DDR) and SoC FPGA architectures.
· Knowledge of embedded processors (MicroBlaze, ARM) and their integration into FPGA designs.
· Familiarity with DSP hardware design, signal processing, and algorithm development.